1. Field of the Invention
The present invention relates to a CMOS (Complementary Metal Oxide Silicon-Field Effect Transistor)-analog IC (Integrated Circuit) for controlling a camera and a camera system using the same.
2. Description of the Related Art
Consider the progress of technology associated with the structures of the electric systems of cameras in general. At the first stage, a sequence control circuit constituted by a CMOS-IC, an automatic exposure (to be referred to as AE hereinafter) circuit constituted by a bipolar (to be referred to as Bip hereinafter) device, an automatic focusing (to be referred to as AF hereinafter) circuit, and the like are connected to a camera body. At the second stage, a microcomputer (to be referred to as a CPU hereinafter) constituted by a CMOS-IC, AE and AF circuits constituted by Bip devices, and the like are connected to a camera body.
As an advanced technique, a technique of integrating a CPU constituted by a CMOS-IC, an AE circuit constituted by Bip devices, and the like into one chip by a Bi.sub.p -CMOS process has been developed as shown in, e.g., the May 1988 issue of "Photographic Industry", p. 88. Circuits constituted by Bip devices are used for AE and AF circuits and the like for the following reasons. First, logarithmic compression techniques, which are frequently used in cameras, can be easily used. Second, analog circuits can be easily designed by using Bip devices. Third, large currents can be easily caused to flow by using Bip devices.
In addition, as an AF circuit using a CMOS device, a reflected light amount integral circuit is generally used, as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 5-280973. Furthermore, in recent years, a display technique based on a liquid crystal display device (LCD) has been widely used. In consideration of the influence of an ambient temperature on the LCD, a technique of changing the voltage of a digital/analog (D/A) converter (DAC) as an LCD driving source in accordance with temperatures has also been proposed.
However, the integration of a CMOS device and a Bip analog circuit into one chip requires a Bip-CMOS process in the manufacturing process, resulting in prolonging the lead time (manufacturing time) and increasing the cost. In addition, since the analog circuit is constituted by Bip devices, the current consumption increases.
The reflected light amount integral device used as the AF circuit using the above CMOS device cannot use a logarithmic compression technique and has no dividing function. For this reason, in order to obtain a high-precision distance measuring unit using such a circuit, the circuit size inevitably increases.
Furthermore, since the AF circuit, AE circuit, remote control circuit, and the like of a camera handle small signals, the resistance of these circuits to noise is low. Conventionally, the only measure against such a drawback is to change the arrangement or pattern of components.
Various techniques associated with cameras use digital timers. Such a digital timer, however, requires clocks, and the noise of the clocks adversely affects various types of measuring circuits required for photographic operations of the cameras.
If the above-described sensor for measuring temperatures is arranged in a chip including a driving circuit for a power supply system, correct temperature measurement cannot be performed at some timing. If temperature measurement is performed at this timing, a proper voltage may not be applied to an LCD for display.
A camera incorporating a distance measuring unit of an active triangulation scheme is generally known. In this scheme, when a photographic operation is to be performed, an infrared-emitting diode (IRED) is caused to instantaneously emit infrared rays to radiate the rays on an object to be photographed through a lens having high directivity. The reflected light is received by a semiconductor position detecting element disposed at a place separated from the IRED in a direction perpendicular to the optical axis by a predetermined baseline length, and an output current corresponding to the light-receiving position is detected, thereby detecting the distance to the object.
This distance measuring unit requires a wide dynamic range because the intensity of reflected light greatly varies depending on the reflectance of an object and the distance thereto. In addition, since the ratio between reflected photocurrents needs to be detected, processing using logarithmic compression/expansion function is required.
For example, Jpn. Pat. Appln. KOKAI Publication Nos. 1-260309 and 62-191702 disclose distance measuring operation circuits each using a collector current supplied from a differential amplifier constituted by a pair of transistors, which current is obtained by supplying two detected currents from a semiconductor position sensor to a logarithmic compression diode and connecting the two logarithmically compressed outputs to the bases of the transistors.
Variations of the above-described distance measuring operation circuit are disclosed in Jpn. Pat. Appln. KOKAI Publication Nos. 1-150809 and 1-224617.
The above distance measuring circuits have been conventionally constituted as bipolar transistor integrated circuits. In a bipolar structure, bipolar transistors and diodes can be freely used, and a functional circuit based on the above-described diode characteristics such as logarithmic compression and logarithmic expansion can be relatively easily formed.
In contrast to this, if the above distance measuring unit is purely constituted by a MOS structure, a MOS transistor generally has the following current-voltage (I-V) characteristics. That is, in the case of an NMOS type,
(1) OFF region: V.sub.GS &lt;V.sub.TN, I.sub.D =0 PA1 (2) ON region: V.sub.GS .gtoreq.V.sub.TN PA1 (i) OFF region: V.sub.GS &gt;V.sub.TP, I.sub.D =0 PA1 (ii) ON region: V.sub.GS &lt;V.sub.TP
(2-1) linear region: V.sub.DS &lt;V.sub.GS -V.sub.TN ##EQU1## (2-2) saturation region: V.sub.DS .gtoreq.V.sub.GS -V.sub.TN ##EQU2## PA2 (1) linear region: V.sub.DS &lt;V.sub.GS -V.sub.TP ##EQU3## (2) saturation region: V.sub.DS .ltoreq.V.sub.GS -V.sub.TP ##EQU4## where I.sub.D is the drain current, V.sub.TN is the NMOS threshold voltage, V.sub.TP is the PMOS threshold voltage, V.sub.GS is the gate-source voltage, V.sub.DS is the drain-source voltage, .mu..sub.n is the electron mobility, .mu..sub.p is the hole mobility, W.sub.eff is the effective channel width, L.sub.eff is the effective channel length, and C.sub.OX is the gate capacitance per unit area.
In the case of a PMOS type,
In addition, a bipolar transistor has the following I-V characteristics: ##EQU5## where .beta. is the DC amplification factor, I.sub.C is the collector current, I.sub.S is the saturation current, V.sub.BE is the base-emitter voltage, and V.sub.T is the thermal voltage.
It is known that the MOS transistor does not have the I-V characteristics based on the logarithmic characteristics of the bipolar transistor in a normal operation range.
For the above-described reasons, it has been considered that it is difficult to form all integrated circuits demanding logarithmic compression/expansion functions as element functions, such as a distance measuring circuit and a photometric circuit, by using elements having MOS structures, and such a manner of forming integrated circuits is not suitable in terms of circuit arrangement.
The MOS transistor, however, has the following advantages over the bipolar transistor which has been conventionally used: (1) a high impedance can be obtained, (2) matching with a logic system can be effectively performed, and (3) shrinkage is basically allowed to an extent greater than that of the bipolar transistor, and a reduction in chip size and cost can be achieved.